Job Description

  • Definition of digital design flows in a mixed-signal environment
  • Management of a small dedicated digital design group
  • Project and scheduling management
  • Design and development of digital & mixed-signal circuits 
  • Design and support automation tools

Requirements

  • Bachelor’s in electrical engineering and 10+ years of industry experience
  • Strong Knowledge of Verilog RTL 
  • Experience with writing Verilog test benches
  • Knowledge of scripting tools and Unix command-line environment
  • Proficiency with Cadence Virtuoso
  • Familiarity with micro-controller implementations
  • Experience with Cadence AMS simulator and analog modeling
  • Excellent written and oral communication skills
  • Master’s degree
  • Experience of managing small groups
  • Knowledge of analog mixed-signal design flows ? Proficiency in programming (tcl, python, etc.)
  • FPGA prototyping experience
  • Experience in Lab prototype evaluation methods
  • Conversion of high-level system specification to RTL/Verilog modules

Application Instructions

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