Job Description

Physical Design Engineer
Austin, TX
6 -10 months+

**Must have 5+ years of experience in synthesis through closure (sign off)

Job Requirements:
• MSEE or BSEE with 7+ years relevant experience preferred (or equivalent education and experience)
• Solid understanding and working knowledge of the GPU/ASIC design flow with solid experience in taping out designs
• Synopsys DC/ICC2, Fusion Compiler knowledge is required.
• Hands-on experience with synthesis, block and full chip implementation with the latest industry P&R/STA flows and tools
• Solid hands on experience with clock tree synthesis (CTS), multi-voltage and multi-clock designs
• Strong working knowledge of formal equivalency checks, LP checks, timing constraints, UPF.
• Experience in block level floor-planning, implementing power grid and area/congestion optimization
• Experience with 16nm finfet or smaller process nodes is strongly preferred
• Sign-off experience with reliability, signal integrity, noise, timing, power, physical and DFM closure is an added advantage
• Strong scripting/programming skills in Tcl, Perl, Shell, and/or Python is strongly preferred.

Thanks and Regards
Venu Keshav

Application Instructions

Please click on the link below to apply for this position. A new window will open and direct you to apply at our corporate careers page. We look forward to hearing from you!

Apply Online