Job Description


TITLE: SoC Integration Design Engineer
LOCATION: Campbell, CA (onsite req'd)
DURATION: 6 months+ (possibility of conversion)

• RTL Design
• Experience with large SoC integration
• Experience with solving difficult design problems (ie. HBM controller design, DMA controller design, top level integration, etc)
• Verilog and System Verilog experience
• Synopsys tools (VCS, DC, etc), ModelSim
• Experience with a combination of the following: PCIe, Ethernet, DDR4, NoC, AXI
• Python experience is a PLUS
• Synthesis experience is a PLUS
• Whole chip ownership experience is a PLUS
• 5-10+ years industry experience
• Collaborative, team player

Thanks and Regards
Venu Keshav
ASICSoft
650-249-6240
venu@asicsoft.com
https://www.linkedin.com/in/venu-r-keshav-549a97126

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