Job Description


TITLE: Verification Engineer
LOCATION: Portland, OR
DURATION: 3 months +

EXPERIENCE:
• 5+ years' experience with Pre-Silicon Verification
• Solid knowledge and understanding of UVM verification, OVM is acceptable but not preferred
• Solid understanding of SystemVerilog
• Experience with all the standard aspects of verification (SVA's, scoreboard, coverage, etc)
• Experience creating and running test benches
• Experience with Synopsys tools
• Deep understanding and experience with Memory Controllers for DDR4/5 or nonvolatile memory
• Knowledge of Object Oriented Programming
• Scripting experience

Application Instructions

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